1. Field of the Invention
An aspect of the present invention relates to a DC-DC converter.
2. Description of the Related Art
As power circuits, there are provided synchronous rectification DC-DC converters that output a PWM (pulse width modulation)-controlled DC voltage by using a high-side transistor and a low-side transistor that are connected to each other in series and provided between a power supply voltage and a reference potential. To generate the PWM-controlled DC voltage, the high-side transistor and the low-side transistor are alternately turned on/off state. The on state periods of the transistors are controlled according to variations of a load and an input voltage.
As for the on/off switching timing, if there exists a period when both of the high-side transistor and the low-side transistor are turned on, a flow-through current occurs and the conversion efficiency is lowered. In view of this, the switch-on timing of each of the high-side transistor and the low-side transistor is delayed to provide a period (dead time) when both of them are turned off.
As a conventional method for delaying the switch-on timing of each of the high-side transistor and the low-side transistor, there is provided a delay circuit utilizing the CR time constant of a capacitor C and a resistor R. However, since a certain time is taken to charge or discharge the capacitor C, it is difficult to attain high-speed switching.
Additionally, since an inverter or a buffer used in the delay circuit have a variation in the threshold value, the dead time set by taking into account the variation.
On the other hand, a method is known which reliably prevents occurrence of a period when both of the high-side transistor and the low-side transistor are turned on, independently of the type or characteristic of a device (refer to JP-2004-23846-A, for example).
A DC-DC converter disclosed in JP-2004-23846-A has detecting sections that detects the on/off states of body diodes of a high-side field-effect transistor and of a low-side field-effect transistor, respectively. The on states of the high-side field-effect transistor and the low-side field-effect transistor are controlled so that an output corresponding to an input signal is output after detecting that one of the body diodes has been turned on.
However, the DC-DC converter disclosed in JP-2004-23846-A has the following problems. In a process that a field-effect transistor makes a transition from an on state to an off state, it is difficult to detect a change to the off state of the field-effect transistor until the impedance of the field-effect transistor becomes sufficiently high and the accompanying body diode makes a sufficient degree of transition to an on state. This results in a problem that the conversion efficiency lowers particularly in the case of high-frequency switching.